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19-1857; Rev 0; 11/00
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs
General Description
The MAX1117/MAX1118/MAX1119 low-power, 8-bit, dual-channel, analog-to-digital converters (ADCs) feature an internal track/hold (T/H) voltage reference (MAX1117/MAX1119), clock, and serial interface. The MAX1118 is specified from +2.7V to +5.5V and consumes only 135A at 100ksps. The MAX1117 is specified from +2.7V to +3.6V, and the MAX1119 is specified from +4.5V to +5.5V, each consumes only 175A at 100ksps. The full-scale analog input range is determined by the internal reference of +2.048V (MAX1117) or +4.096V (MAX1119), or by an externally applied reference ranging from +1V to VDD (MAX1118). All devices feature an automatic shutdown mode that reduces supply current to <1A when the device is not in use. The 3-wire serial interface directly connects to SPITM, QSPITM, and MICROWIRETM devices without external logic. Conversions up to 100ksps are performed using an internal clock. The MAX1117/MAX1118/MAX1119 are available in an 8-pin SOT23 package with a footprint that is only 11% of an 8-pin plastic DIP. o Single Supply +2.7V to +3.6V (MAX1117) +2.7V to +5.5V (MAX1118) +4.5V to +5.5V (MAX1119) o Internal Track/Hold: 100kHz Sampling Rate o Internal Reference +2.048V (MAX1117) +4.096V (MAX1119) o Reference Input Range: 0 to VDD (MAX1118) o SPI/QSPI/MICROWIRE-Compatible Serial Interface o Small 8-Pin SOT23 Package o Automatic Power-Down o Analog Input Range: 0 to VREF o Low Power 175A at 100ksps (typ) (MAX1117/MAX1119) 135A at 100ksps (typ) (MAX1118) 18A at 10ksps (typ) 1A (typ) in Power-Down Mode
Features
MAX1117/MAX1118/MAX1119
________________________Applications
Low-Power, Handheld Portable Devices System Diagnostics Battery-Powered Test Equipment Solar-Powered Remote Systems Receive Signal Strength Indicators 4mA to 20mA Powered Remote Data Acquisition Systems
PART MA X1 11 7EKA MA X1 11 8EKA MA X1 11 9EKA
Ordering Information
TEMP. RANGE -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 8 SOT23 8 SOT23 8 SOT23 TOP MARK AADW AADX AADY
Pin Configuration
TOP VIEW
SPI/QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor, Corp.
VDD 1 CHO CH1 GND 2 3 4 8 7 SCLK DOUT CNVST (REF) I.C
MAX1117 MAX1118 MAX1119 SOT23
6 5
Functional Diagram appears at end of data sheet.
( ) ARE FOR MAX1118 ONLY
________________________________________________________________ Maxim Integrated Products
1
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +6.0V CH0,CH1, REF to GND...............................-0.3V to (VDD + 0.3V) Digital Output to GND ................................-0.3V to (VDD + 0.3V) Digital Input to GND ..............................................-0.3V to +6.0V Maximum Current into Any Pin .........................................50mA Continuous Power Dissipation (TA = +70C) 8-Pin SOT23 (derate 8.9mW/C above +70C)............714mW Operating Temperature Range MAX1117EKA ..................................................-40C to + 85C MAX1118EKA ..................................................-40C to + 85C MAX1119EKA ..................................................-40C to + 85C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX1117), VDD = +4.5V to +5.5V (MAX1119), VDD = REF = +2.7V to +5.5V (MAX1118),TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER DC ACCURACY Resolution Relative Accuracy (Note 1) Differential Nonlinearity Offset Error Gain Error Gain Temperature Coefficient Total Unadjusted Error Channel-to-Channnel Offset Matching TUE MAX1118, REF = VDD MAX1117/MAX1119 MAX1118 MAX1117/MAX1119 MAX1118 5 90 0.5 0.1 1 INL DNL 8 1 1 0.5 1 5 Bits LSB LSB LSB LSB %FSR ppm/C LSB LSB SYMBOL CONDITIONS MIN TYP MAX UNITS
DYNAMIC PERFORMANCE (25kHz sinewave input, VIN = VREF(pp), fSCLK = 5MHz, fsample = 100ksps, RIN = 100) 48 Signal-to-Noise Plus Distortion SINAD Total Harmonic Distortion (Up to the 5th Harmonic) Spurious-Free Dynamic Range Small Signal Bandwidth ANALOG INPUT Input Voltage Range Input Leakage Current Input Capacitance INTERNAL REFERENCE Voltage VREF MAX1117 MAX1119 2.048 4.096 CIN VCH_ = 0 or VDD 0 0.7 18 VREF 10 THD SFDR f-3dB -69 66 4
dB dB dB MHz V A pF
V
2
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Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1117), VDD = +4.5V to +5.5V (MAX1119), VDD = REF = +2.7V to +5.5V (MAX1118),TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER Input Voltage Range Input Current POWER REQUIREMENTS MAX1118 Supply Voltage VDD MAX1117 MAX1119 MAX1119, fSAMPLE = 100ksps, zero-scale input MAX1117/MAX1118, fSAMPLE = 100ksps, zero-scale input Supply Current (Note 2) IDD MAX1119, fSAMPLE = 10ksps, zero-scale input MAX1117/MAX1118, fSAMPLE = 10ksps, zero-scale input Shutdown Supply Rejection Ratio Input High Voltage Input Low Voltage Input Hystersis Input Current High Input Current Low Input Capacitance DIGITAL OUTPUT (DOUT) Output High Voltage Output Low Voltage Three-State Leakage Current Three-State Output Capacitance CNVST High Time CNVST Low Time Conversion Time Serial Clock High Time Serial Clock Low Time Serial Clock Period Falling of CNVST to DOUT Active PSRR VIH VIL VHYST IIH IIL CIN VOH VOL IL COUT tcsh tcsi tconv tch tcl tcp tcsd CLOAD = 100pF, Figure 1 75 75 200 100 100 100 7.5 ISOURCE = 2mA ISINK = 2mA ISINK = 4mA 0.01 4 VDD - 0.5 0.4 0.8 10 2 0.2 10 10 Full-scale or 0 input 2 0.8 DIGITAL INPUTS (CNVST AND SCLK) V V V A A pF V V V A pF ns ns s ns ns ns ns 2.7 2.7 4.5 182 135 19 14 0.8 0.5 5.5 5.5 5.5 230 190 25 21 10 1 LSB/V A V Ave, VDD = REF = +5.5V at 100ksps SYMBOL CONDITIONS MIN 1.0 10 TYP MAX VDD 20 UNITS V A
MAX1117/MAX1118/MAX1119
EXTERNAL REFERENCE (MAX1118 ONLY)
TIMING CHARACTERISTICS (Figures 6a-6d)
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3
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1117), VDD = +4.5V to +5.5V (MAX1119), VDD = REF = +2.7V to +5.5V (MAX1118),TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER Serial Clock Falling Edge to DOUT Serial Clock Rising Edge to DOUT High-Z Last Serial Clock to Next CNVST (Successive Conversions on CH0) SYMBOL tcd tchz CONDITIONS CLOAD = 100pF CLOAD = 100pF, Figure 2 MIN 10 TYP MAX 100 UNITS ns ns
100
500
tccs
50
ns
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and offset have been calibrated. Note 2: Input = 0, with logic input levels of 0 and VDD.
Typical Operating Characteristics
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF, TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs.OUTPUT CODE
MAX1117/18/19 toc01
DIFFERENTIAL NONLINEARITY vs.OUTPUT CODE
0.8 0.6 0.4 DNL (LSB) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0.1 0 0 50 100 150 200 250 300 2.5 OUTPUT CODE
MAX1117/18/19 toc02
SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1117/18/19 toc03
1.0 0.8 0.6 0.4 INL (LSB) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 50 100 150 200 250
1.0
0.7 0.6 SHUTDOWN CURRENT (A) 0.5 0.4 0.3 0.2
300
OUTPUT CODE
3.5 4.5 SUPPLY VOLTAGE (V)
5.5
MAX1118 SUPPLY CURRENT vs. CONVERSION RATE
MAX1117/18/19 toc04
MAX1118 SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1117/18/19 toc05
MAX1118 SUPPLY CURRENT vs. TEMPERATURE
MAX1117/18/19 toc06
100.0 VDD = VREF = VDIGITAL SUPPLY CURRENT (A)
160 140 SUPPLY CURRENT (A) 120 110 80 60 40 20 DOUT = 00000000 VDD = VREF = VDIGITAL INPUTS
150
10.0
SUPPLY CURRENT (A)
VDD = +5V 100 VDD = +3V 50 DOUT = 00000000 VDD = VREF = VDIGITAL INPUTS 0
VDD = +5V
1.0
VDD = +3V
0.1 0.01 0.1 1 10 100 CONVERSION (ksps)
0 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
TEMPERATURE (C)
4
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Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF, TA = +25C, unless otherwise noted.)
MAX1117/MAX1119 SUPPLY CURRENT vs. CONVERSION RATE
MAX1117/18/19 toc07
MAX1117/MAX1118/MAX1119
MAX1117/MAX1119 SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1117/18/19 toc08
MAX1117/MAX1119 SUPPLY CURRENT vs. TEMPERATURE
MAX1117/18/19 toc09
100.0
200
200
SUPPLY CURRENT (A)
10.0
MAX1119
SUPPLY CURRENT (A)
MAX1119 VDD = +5V
SUPPLY CURRENT (A)
150
150
MAX1119 VDD = +5V MAX1117 VDD = +3V
100
MAX1117
100
1.0
MAX1117 VDD = +3V
50
DOUT = 00000000 VDD = VDIGITAL INPUTS
50
DOUT = 00000000 VDD = VDIGITAL INPUTS
0.1 0.01
0 0.1 1 10 100 2.5 3.5 4.5 5.5 CONVERSION (ksps) SUPPLY VOLTAGE (V)
0 -40 -15 10 35 60 85 TEMPERATURE (V)
CONVERSION TIME vs. SUPPLY VOLTAGE
MAX1117/18/19 toc11
CONVERSION TIME vs. TEMPERATURE
MAX1117/18/19 toc12
FFT PLOT
MAX1117/18/19 toc13
5.5
5.5
0 -20 AMPLITUDE (dB) -40 -60 -80 -100 -120
5.4 CONVERSION TIME (s)
5.4 CONVERSION TIME (s) VDD = +3V 5.3
5.3
5.2
5.2 VDD = +5V 5.1
5.1
5.0 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
5.0 -40 -15 10 35 60 85 TEMPERATURE (C)
0
10k
20k
30k
40k
50k
ANALOG INPUT FREQUENCY (Hz)
MAX1118 GAIN ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc14
MAX1118 GAIN ERROR vs. TEMPERATURE
MAX1117/18/19 toc15
MAX1118 GAIN ERROR vs. REFERENCE VOLTAGE
VDD = +5.5V
MAX1117/18/19 toc16
0.5 0.4 0.3 GAIN ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 VDD = +3V VREF = 2.048V
0
0.4
VREF = 2.048V
-0.2 GAIN ERROR (LSB) -0.4
GAIN ERROR (LSB)
0.2
0
-0.6
-0.2 -0.4 2.5 3.5 4.5 5.5
-0.8
-0.4 -0.5 -40 -15 10 35 60 85 SUPPLY VOLTAGE (V) TEMPERATURE (C) -1.0 1 2 3 4 5 REFERENCE VOLTAGE (V)
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5
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF, TA = +25C, unless otherwise noted.)
MAX1118 OFFSET ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc17
MAX1118 OFFSET ERROR vs. TEMPERATURE
MAX1117/18/19 toc18
MAX1118 OFFSET ERROR vs. REFERENCE VOLTAGE
VDD = 5.5V 0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5
MAX1117/18/19 toc19
0.5 0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5
VREF = 2.048V
0.5 0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5
VDD = +3V VREF = 2.048V
0.5
3.0
3.5
4.0
4.5
5.0
5.5
-40
-15
10
35
60
85
1
2
3
4
5
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
REFERENCE VOLTAGE (V)
MAX1117/MAX1119 GAIN ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc20
MAX1117/MAX1119 GAIN ERROR vs. TEMPERATURE
1.5 GAIN ERROR (%FSR) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -100 -120 -40 -15 10 35 60 85 0 10k MAX1117 VDD = +3V MAX1116 VDD = +5V
MAX1117/18/19 toc21
FFT PLOT
fSAMPLE = 100kHz fIN = 25.1kHz AIN = 0.9 x VREFp-p
MAX1117/18/19 toc22
1.4 1.2 GAIN ERROR (%FSR) 1.0 0.8 0.6 0.4 0.2 0 2.5 3.5 4.5 MAX1117 VDD = +3V MAX1119 VDD = +5V
2.0
0 -20 AMPLITUDE (dB) -40 -60 -80
5.5
20k
30k
40k
50k
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
ANALOG INPUT FREQUENCY (Hz)
MAX1117/MAX1119 OFFSET ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc23
MAX1117/MAX1119 OFFSET ERROR vs. TEMPERATURE
0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 MAX1119 VDD = +5V MAX1117 VDD = +3V
MAX1117/18/19 toc24
0.5 0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 3.0 3.5 4.0 4.5 5.0 MAX1117 VDD = +3V MAX1119 VDD = +5V
0.5
5.5
-40
-15
10
35
60
85
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
6
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Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF, TA = +25C, unless otherwise noted.)
REFERENCE VOLTAGE vs. NUMBER OF PIECES
MAX1115 toc25
MAX1117/MAX1118/MAX1119
REFERENCE VOLTAGE vs. NUMBER OF PIECES
MAX1117/18/19 toc26
21.0% 17.5% 14.0% 10.5% 7.0% 3.5% 0 3.980
21.0% 17.5% 14.0% 10.5% 7.0% 3.5% 0 1.982
4.020
4.060
4.100
4.140
4.180
2.008
2.034
2.060
2.086
2.112
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME VDD CH0 CH1 GND I.C.(REF) CNVST DOUT SCLK Positive Supply Voltage CH0 Analog Voltage Input CH1 Analog Voltage Input Ground Internally Connected. Connect to ground. (Reference Input, MAX1118 only.) Convert/Start Input. CNVST initiates a power-up and starts a conversion on its falling edge. Serial Data Output. Data is clocked out on the falling edge of SCLK. DOUT goes low at the start of a conversion and presents the MSB at the completion of a conversion. DOUT goes high impedance once data has been fully clocked out. Serial Clock. Used for clocking out data on DOUT. FUNCTION
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7
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
VDD
VDD 3k DOUT DOUT
3k DOUT DOUT
3k GND a) VOL TO VOH
CLOAD
CLOAD GND b) HIGH-Z to VOL AND VOH to VOL
3k GND a) VOH TO HIGH-Z
CLOAD
CLOAD GND b) VOL TO HIGH-Z
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disable Time
GND VDD CAPACITIVE DAC
VDD CH0 ANALOG INPUTS CH1 GND VDD 0.1F 1F
MAX1117 MAX1118 MAX1119
REF* 1F DOUT CNVST SCLK I/O
CPU
CH0 CH1
CHOLD 16pF COMPARATOR RIN 6.5k HOLD TRACK
SCK (SK) MISO (SI) GND
* MAX1118 ONLY
AUTOZERO RAIL
Figure 3. Typical Operating Circuit
Figure 4. Equivalent Input Circuit
Detailed Description
The MAX1117/MAX1118/MAX1119 ADCs use a successive-approximation conversion technique and input T/H circuitry to convert an analog signal to an 8-bit digital output. The SPI/QSPI/MICROWIRE compatible interface directly connects to microprocessors (Ps) without additional circuity (Figure 3). Track/Hold The input architecture of the ADC is illustrated in Figure 4's equivalent-input circuit and is composed of the T/H, the input multiplexer, the input comparator, the switched capacitor DAC, and the auto-zero rail. The acquisition interval begins with the falling edge of CNVST. During the acquisition interval, the analog
8
inputs (CH0, CH1) are connected to the holding capacitor (CHOLD). Once the acquisition has completed, the T/H switch opens and CHOLD is connected to GND, retaining the charge on CHOLD as a sample of the signal at the analog input. Sufficiently low source impedance is required to ensure an accurate sample. A source impedance <1.5k is recommended for accurate sample settling. A 100pF capacitor at the ADC inputs will also improve the accuracy of an input sample. Conversion Process The MAX1117/MAX1118/MAX1119 conversion process is internally timed. The total acquisition and conversion process takes <7.5s. Once an input sample has been acquired, the comparator's negative input is then con-
_______________________________________________________________________________________
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs
nected to an autozero supply. Since the device requires only a single supply, the negative input of the comparator is set to equal VDD/2. The capacitive DAC restores the positive input to VDD/2 within the limits of 8bit resolution. This action is equivalent to transferring a charge QIN = 16pF x VIN from CHOLD to the binaryweighted capacitive DAC, which in turn forms a digital representation of the analog-input signal. Input Voltage Range Internal protection diodes that clamp the analog input to VDD and GND allow the input pins (CH0, CH1) to swing from (GND - 0.3V) to (VDD + 0.3V) without damage. However, for accurate conversions, the inputs must not exceed (VDD + 50mV) or be less than (GND 50mV). Input Bandwidth The ADC's input tracking circuitry has a 4MHz smallsignal bandwidth, so it is possible to digitize highspeed transient events and measure periodic signals with bandwidths exceeding the ADC's sampling rate by using undersampling techniques. To avoid high-frequency signals being aliased into the frequency band of interest, anti-alias filtering is recommended. be brought high for at least 50ns, then brought low to initiate a conversion. To select CH1 for conversion, the CNVST pin must be brought high and low for a second time (Figures 6c and 6d). After CNVST is brought low, allow 7.5s for the conversion to be completed. While the internal conversion is in progress, DOUT is low. The MSB is present at the DOUT pin immediately after conversion is completed. The conversion result is clocked out at the DOUT pin and is coded in straight binary (Figure 7). Data is clocked out at SCLK's falling edge in MSB-first format at rates up to 5MHz. Once all data bits are clocked out, DOUT goes high impedance (100ns to 500ns after the rising edge) of the eighth SCLK pulse.
MAX1117/MAX1118/MAX1119
I/O SCK MISO +3V
CNVST SCLK DOUT
Serial Interface
The MAX1117/MAX1118/MAX1119 have a 3-wire serial interface. The CNVST and SCLK inputs are used to control the device, while the three-state DOUT pin is used to access the conversion results. The serial interface provides connection to microcontrollers (Cs) with SPI, QSPI, and MICROWIRE serial interfaces at clock rates up to 5MHz. The interface supports either an idle high or low SCLK format. For SPI and QSPI, set CPOL = CPHA = 0 or CPOL = CPHA = 1 in the SPI control registers of the C. Figure 5 shows the MAX1117/MAX1118/MAX1119 common serial-interface connections. See Figures 6a-6d for details on the serial interface timing and protocol.
a) SPI
SS
MAX1117 MAX1118 MAX1119
CS SCK MISO +3V
CNVST SCLK DOUT
SS b) QSPI I/O SK SI
MAX1117 MAX1118 MAX1119
CNVST SCLK DOUT
Digital Inputs and Outputs
The MAX1117/MAX1118/MAX1119 perform conversions using an internal clock. This frees the P from the burden of running the SAR conversion clock and allows the conversion results to be read back at the P's convenience at any clock rate up to 5MHz. The acquisition interval begins with the falling edge of CNVST. CNVST can idle between conversions in either a high or low state. If idled in a low state, CNVST must
MAX1117 MAX1118 MAX1119
c) MICROWIRE
Figure 5. Common Serial-Interface Connections
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9
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
ACTIVE tcsh POWER-DOWN MODE
CNVST
CH0 tconv tch tcp tccs
CH0
SCLK
IDLE LOW tcsd tcd tcl tchz
IDLE LOW
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6a. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle Low
ACTIVE tcsh
POWER-DOWN MODE
CNVST
CH0 tconv tch tcp tccs
CH0
SCLK IDLE HIGH IDLE HIGH
tcsd
tcd
tcl
tchz
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6b. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle High
During the conversion process, SCLK is ignored. Only after a conversion is complete will SCLK cause serial data to be output. Falling edges on CNVST, during an active conversion process, interrupt the current conversion and cause the input multiplexer to switch to CH1. To reinitiate a conversion on CH0, it is necessary to
AutoShutdown is a trademark of Maxim Integrated Products. 10
allow for a conversion to be complete and all of the data to be read out. Once a conversion has been completed, the MAX1117/MAX1118/MAX1119 will go into AutoShutdownTM mode (<1A typ) until the next conversion is initiated.
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Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
ACTIVE tcsh POWER-DOWN MODE tcsl
CH0 CNVST
CH1 tch tcp tccs
CH0
CH1
tconv
SCLK tcsd
IDLE LOW tcd tcl tchz
IDLE LOW
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6c. Conversion and Interface Timing, Conversion on CH1 with SCLK Idle Low
ACTIVE tcsh
POWER-DOWN MODE tcsl
CH0 CNVST
CH1 tch tcp
CH0 tccs
CH1
tconv SCLK IDLE HIGH
IDLE HIGH
tcsd
tcd
tcl
tchz
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6d. Conversion and Interface Timing, Conversion on CH1 with SCLK Idle High
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11
Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
OUTPUT CODE 11111111 11111110 GND 11111101 +3V/+5V FULL-SCALE TRANSITION SYSTEM POWER SUPPLIES
FS = VREF 1LSB = VREF 256 00000011 00000010 00000001 00000000 0 1 2 3 INPUT VOLTAGE (LSB) FS FS - 1 1/2 LSB *OPTIONAL GND
1F
10*
0.1F VDD MAX1117 MAX1118 MAX1119 DGND VDD
DIGITAL CIRCUITRY
Figure 7. Input/Output Transfer Function
Figure 8. Power-Supply Connections
Applications Information
Power-On Reset
When power is first applied, the MAX1117/MAX1118/ MAX1119 are in AutoShutdown state (<1A typ). A conversion can be started by toggling CNVST high to low. Powering up the MAX1117/MAX1118/MAX1119 with CNVST low will not start a conversion. Conversions initiated prior to the external reference settling (MAX1118) will result in errors. Thus, it is necessary to allow the external reference to stabilize prior to initiating a conversion.
15A, while at 1ksps it drops to 1.5A and at 0.1ksps it is just 0.3A, or a miniscule 1W of power consumption (see Average Supply Current vs. Conversion Rate Plot in the Typical Operating Characteristics).
External Voltage Reference (MAX1118)
Connect an external reference between +1V and VDD at the REF pin. The DC input impedance at REF is extremely high, consisting of leakage current only (10nA typ). During a conversion, the reference must be able to deliver up to 20A average load current and have an output impedance of 100 or less. If the reference has higher output impedance or is noisy, bypass it close to the REF pin with a 10nF or larger capacitor.
AutoShutDown and Supply Current Requirements
The MAX1117/MAX1118/MAX1119 are designed to automatically shutdown once a conversion is complete without any external control. An input sample and conversion process will typically take 5s to complete, during which time the supply current to the analog sections of the device is fully on. All analog circuitry is shutdown after a conversion completes, which results in a supply current of <1A (see Shutdown Current vs. Supply Voltage Plot in the Typical Operating Characteristics). The digital conversion result is maintained in a static register and is available for access through the serial interface at any time. The power consumption consequence of this architecture is dramatic when relatively slow conversion rates are needed. For example, at a conversion rate of 10ksps, the average supply current for the MAX1117 is
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Transfer Function
Figure 7 depicts the input/output transfer function. Output coding is binary with a +2.048V reference 1LSB = 8mV (VREF/256).
Layout, Grounding, Bypassing
For best performance, the board layout should ensure that digital and analog signal lines are separated from each other. Do not run analog and digital (especially clock) lines parallel to one another or run digital lines underneath the ADC package. Figure 8 shows the recommended system-ground connections. A single-point analog ground (star-ground point) should be established at the ADC ground. Connect all analog grounds to the star ground. The ground return to the power supply for the star ground
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Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs
Functional Diagrams
MAX1117/MAX1118/MAX1119
SCLK
CNVST
CONTROL LOGIC AND INTERNAL OCSILLATOR
VDD
GND
CH0 INPUT MULTIPLEXER CH1 INPUT TRACK AND HOLD 8-BIT SAR ADC OUTPUT SHIFT REGISTER OUT
INTERNAL REFERENCE +2.096V OR +4.096V
MAX1117 MAX1119
should be low impedance and as short as possible for noise-free operation. High-frequency noise in the VDD power supply may affect the comparator in the ADC. Bypass the supply to the star ground with a 0.1F capacitor close to the VDD pin of the MAX1117/MAX1118/MAX1119. Minimize capacitor lead lengths for best supply-noise rejection. If the power supply is noisy, a 1F capacitor in conjunction with a 10 series resistor can be connected to form a lowpass filter.
Chip Information
TRANSISTOR COUNT: 2000 PROCESS: BiCMOS
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Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs MAX1117/MAX1118/MAX1119
Package Information
SOT23, 8L.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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